Semiconductor devices such as logic and memory devices are typically fabricated by a sequence of processing steps applied to a specimen. The various features and multiple structural levels of the semiconductor devices are formed by these processing steps. For example, lithography among others is one semiconductor fabrication process that involves generating a pattern on a semiconductor wafer. Additional examples of semiconductor fabrication processes include, but are not limited to, chemical-mechanical polishing, etch, deposition, and ion implantation. Multiple semiconductor devices may be fabricated on a single semiconductor wafer and then separated into individual semiconductor devices.
A lithographic process, as described above, is performed to selectively remove portions of a resist material overlaying the surface of a wafer, thereby exposing underlying areas of the specimen on which the resist is formed for selective processing such as etching, material deposition, implantation, and the like. Therefore, in many instances, the performance of the lithography process largely determines the characteristics (e.g., dimensions) of the structures formed on the specimen. Consequently, the trend in lithography is to design systems and components (e.g., resist materials) that are capable of forming patterns having ever smaller dimensions.
While the critical dimensions of lithographic patterning have reached nanometer scale, the roughness of the patterns has remained largely unchanged. As the impact of roughness on device performance increases, roughness metrology has been rapidly growing in importance with decreasing feature sizes in the semiconductor industry.
Traditional roughness measurement techniques include Scanning Electron Microscopy (SEM), Tunneling Electron Microscopy (TEM), and Atomic Force Microscopy (AFM). By way of example, FIG. 1 illustrates a top-view, SEM image 10 of a lithographically patterned structure illustrating Line Edge Roughness (LER). The image of FIG. 1 is excerpted from C. A. Mack, Field Guide to Optical Lithography, SPIE Press, Bellingham, Wash. (2006) and is currently viewable at http://spie.org/x32401.xml. Multiple implementations of SEM and associated analysis algorithms have been developed to improve roughness metrology. Exemplary implementations are discussed in U.S. Patent Application Publication 2009/0114816 entitled “Advanced Roughness Metrology” by Aviram Tam, et al., and assigned to Applied Materials, Inc. Primary disadvantages of SEM (a.k.a., CD-SEM) include limited viewing angles and a potentially destructive impact on structures under examination. This is especially undesirable in resist metrology. For the case of TEM, destructive testing of the sample is required in addition to the aforementioned disadvantages. AFM also suffers from low throughput, and in addition, offers a limited ability to characterize complex structures with sufficient probe reliability.
Inspection processes based on optical metrology are used at various steps during a semiconductor manufacturing process to detect defects on wafers to promote higher yield. Optical metrology techniques offer the potential for high throughput without the risk of sample destruction. A number of optical metrology based techniques including scatterometry implementations and associated analysis algorithms to characterize roughness have been described.
A scatterometry approach for an artificial periodic roughness is described in “Optical Fourier transform scatterometry for LER and LWR metrology,” by P. Boher et al, Proc. SPIE, vol. 5752, p. 192 (2005). The description appears to lack the capability to deal with real roughness that causes light scattering outside of well-defined diffraction orders.
Effective Medium Approximations (EMA) for a region of roughness are described in “Line edge roughness detection using deep UV light scatterometry,” by B. Yaakobovitz et al., Microel. Eng., vol. 84, p. 619 (2007) and “Effective medium approximations for modeling optical reflectance from gratings with rough edges,” by B. Bergner et al., JOSA A, vol. 27, p. 1083 (2010). EMA algorithms are used to simulate scatterometry (e.g., reflectometry or ellipsometry) measurements by approximating roughness as an effective dielectric layer. These approaches appear to lack the flexibility required to describe the actual scattering process and cannot analyze statistical properties of random roughness.
Roughness analysis using Fourier scatterometry and spectroscopic ellipsometry is described in “Influence of line edge roughness on angular resolved and on spectroscopic scatterometry,” by T. Schuster, Proc. SPIE, vol. 7155 (2008). However, the described roughness is artificially simulated with EMA algorithms or periodic roughness models that are limited in their ability to accurately describe actual scattering processes.
A modeling approach to simulate roughness effects in angle-resolved scatterometry is described in “Effect of line roughness on the diffraction intensities in angular resolved scatterometry,” Appl. Opt., vol. 49. p. 6102 (2010). However, a suitable hardware implementation critical to achieving the required degree of sensitivity and throughput is not described.
U.S. Pat. No. 8,045,179 entitled “Bright and dark field scatterometry systems for line roughness metrology,” issued Oct. 25, 2011, to KLA-Tencor Corporation describes a metrology tool that characterizes roughness based on the ratio of power fractions of diffusely scattered light and light diffracted into regular diffracted orders.
A dark-field LER measurement technique is described in “LER detection using dark field spectroscopic reflectometry,” by B. Brill et al, Proc. SPIE, vol. 7638, 76380P (2010). However, characterizations of LER by dark-field measurements often suffer from a low signal-to-noise ratio that negatively impacts throughput and sensitivity.
In summary, SEM, TEM, and AFM techniques lack throughput and flexibility to analyze complex targets with roughness (e.g., line edge roughness, line width roughness, topography irregularities, etc.). Optical metrology techniques currently rely on artificial assumptions and/or require complex, low-sensitivity detection schemes primarily relying on the dark field signal.
As lithographic and inspection systems are pressed to higher accuracies, roughness becomes a limiting factor in maintaining device yield. Thus, improved methods and systems for characterizing roughness as well as nominal target parameters (e.g., CD, etc.) at high throughput are desired.